NB3F8L3005C Description
A Mux selects between a Crystal input, or a differential/SE Clock / Data inputs. Differential Inputs accept LVPECL, LVDS, HCSL, or SSTL and Single−Ended levels. The MUX control line, SEL selects CLK/CLK, or Crystal input pins per Table.
NB3F8L3005C Key Features
- Five LVCMOS / LVTTL Outputs up to 200 MHz
- Differential Inputs Accept LVPECL, LVDS, HCSL, SSTL, or
- Crystal Interface
- Crystal Input Frequency Range: 10 MHz to 50 MHz
- Output Skew: 10 ps Typical
- Additive RMS Phase Jitter @ 156.25 MHz, (12 kHz
- 20 MHz)
- Synchronous Output Enable
- Output Defined Level When Input is Floating
- Power Supply Modes