900,000+ datasheet pdf search and download

Datasheet4U offers most rated semiconductors data sheet pdf




  ON Semiconductor Electronic Components Datasheet  

MC74VHC1GT125 Datasheet

Noninverting Buffer / CMOS Logic Level Shifter

No Preview Available !

MC74VHC1GT125
Noninverting Buffer /
CMOS Logic Level Shifter
with LSTTLCompatible Inputs
The MC74VHC1GT125 is a single gate noninverting buffer
fabricated with silicon gate CMOS technology. It achieves high speed
operation similar to equivalent Bipolar Schottky TTL while
maintaining CMOS low power dissipation.
The MC74VHC1GT125 requires the 3state control input (OE) to
be set High to place the output into the high impedance state.
The device input is compatible with TTLtype input thresholds and
the output has a full 5 V CMOS level output swing. The input protection
circuitry on this device allows overvoltage tolerance on the input,
allowing the device to be used as a logiclevel translator from 3 V
CMOS logic to 5 V CMOS Logic or from 1.8 V CMOS logic to 3 V
CMOS Logic while operating at the highvoltage power supply.
The MC74VHC1GT125 input structure provides protection when
voltages up to 7 V are applied, regardless of the supply voltage. This
allows the MC74VHC1GT125 to be used to interface 5 V circuits to
3 V circuits. The output structures also provide protection when
VCC = 0 V. These input and output structures help prevent device
destruction caused by supply voltage input/output voltage mismatch,
battery backup, hot insertion, etc.
Features
High Speed: tPD = 3.5 ns (Typ) at VCC = 5 V
Low Power Dissipation: ICC = 1 mA (Max) at TA = 25°C
TTLCompatible Inputs: VIL = 0.8 V; VIH = 2 V
CMOSCompatible Outputs: VOH > 0.8 VCC; VOL < 0.1 VCC @Load
Power Down Protection Provided on Inputs and Outputs
Balanced Propagation Delays
Pin and Function Compatible with Other Standard Logic Families
Chip Complexity: FETs = 62; Equivalent Gates = 16
These Devices are PbFree and are RoHS Compliant
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AECQ100
Qualified and PPAP Capable
http://onsemi.com
5
1
SC88A / SOT353 / SC70
DF SUFFIX
CASE 419A
MARKING
DIAGRAMS
5
W1 M G
G
1
5
1
TSOP5 / SOT23 / SC59
DT SUFFIX
CASE 483
5
W1 M G
G
1
W1 = Device Code
M = Date Code*
G = PbFree Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may vary
depending upon manufacturing location.
PIN ASSIGNMENT
1 OE
2 IN A
3 GND
4 OUT Y
5 VCC
OE 1
IN A 2
GND 3
5 VCC
4 OUT Y
Figure 1. Pinout (Top View)
OE
IN A OUT Y
Figure 2. Logic Symbol
© Semiconductor Components Industries, LLC, 2012
September, 2012 Rev. 14
1
A Input
L
H
X
FUNCTION TABLE
OE Input
Y Output
LL
LH
HZ
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
Publication Order Number:
MC74VHC1GT125/D


  ON Semiconductor Electronic Components Datasheet  

MC74VHC1GT125 Datasheet

Noninverting Buffer / CMOS Logic Level Shifter

No Preview Available !

MC74VHC1GT125
MAXIMUM RATINGS
Symbol
Characteristics
Value
Unit
VCC
VIN
VOUT
DC Supply Voltage
DC Input Voltage
DC Output Voltage
IIK
IOK
IOUT
ICC
PD
qJA
TL
TJ
Tstg
VESD
Input Diode Current
Output Diode Current
DC Output Current, per Pin
DC Supply Current, VCC and GND
Power Dissipation in Still Air
Thermal Resistance
Lead Temperature, 1 mm from Case for 10 s
Junction Temperature Under Bias
Storage Temperature
ESD Withstand Voltage
VCC = 0
High or Low State
VOUT < GND; VOUT > VCC
SC88A, TSOP5
SC88A, TSOP5
Human Body Model (Note 1)
Machine Model (Note 2)
Charged Device Model (Note 3)
0.5 to +7.0
0.5 to +7.0
0.5 to 7.0
0.5 to VCC + 0.5
20
+20
+25
+50
200
333
260
+150
65 to +150
> 2000
> 200
N/A
V
V
V
mA
mA
mA
mA
mW
°C/W
°C
°C
°C
V
ILatchup Latchup Performance
Above VCC and Below GND at 125°C (Note 4)
±500
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Tested to EIA/JESD22A114A
2. Tested to EIA/JESD22A115A
3. Tested to JESD22C101A
4. Tested to EIA/JESD78
RECOMMENDED OPERATING CONDITIONS
Symbol
Characteristics
VCC
VIN
VOUT
TA
tr , tf
DC Supply Voltage
DC Input Voltage
DC Output Voltage
Operating Temperature Range
Input Rise and Fall Time
VCC = 5.0 V ± 0.5 V
Min
3.0
0.0
0.0
55
0
Max
5.5
5.5
VCC
+125
20
Unit
V
V
V
°C
ns/V
Device Junction Temperature versus
Time to 0.1% Bond Failures
Junction
Temperature 5C
80
90
100
110
120
130
140
Time, Hours
1,032,200
419,300
178,700
79,600
37,000
17,800
8,900
Time, Years
117.8
47.9
20.4
9.4
4.2
2.0
1.0
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
1
1 10
100 1000
TIME, YEARS
Figure 3. Failure Rate vs. Time
Junction Temperature
http://onsemi.com
2


Part Number MC74VHC1GT125
Description Noninverting Buffer / CMOS Logic Level Shifter
Maker ON Semiconductor
Total Page 6 Pages
PDF Download

MC74VHC1GT125 Datasheet PDF

View PDF for Mobile








Similar Datasheet

1 MC74VHC1GT125 Noninverting Buffer / CMOS Logic Level Shifter
ON Semiconductor
2 MC74VHC1GT126 Noninverting 3-State Buffer
ON Semiconductor





Part Number Start With

0    1    2    3    4    5    6    7    8    9    A    B    C    D    E    F    G    H    I    J    K    L    M    N    O    P    Q    R    S    T    U    V    W    X    Y    Z

Site map

Webmaste! click here

Contact us

Buy Components

Privacy Policy