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DM74LS93N - Decade and Binary Counters

This page provides the datasheet information for the DM74LS93N, a member of the DM74LS93 Decade and Binary Counters family.

Description

Each of these monolithic counters contains four masterslave flip-flops and additional gating to provide a divide-bytwo counter and a three-stage binary counter for which the count cycle length is divide-by-five for the ’LS90 and divideby-eight for the ’LS93 All of these counters have a gated zero re

Features

  • Y Typical power dissipation 45 mW Y Count frequency 42 MHz Connection Diagrams (Dual-In-Line Packages) TL F 6381.
  • 1 Order Number DM74LS90M or DM74LS90N See NS Package Number M14A or N14A TL F 6381.
  • 2 Order Number DM74LS93M or DM74LS93N See NS Package Number M14A or N14A C1995 National Semiconductor Corporation TL F 6381 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Note) If Military Aerospace specified devices are required please contact the National Semiconduct.

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DM74LS90 DM74LS93 Decade and Binary Counters June 1989 DM74LS90 DM74LS93 Decade and Binary Counters General Description Each of these monolithic counters contains four masterslave flip-flops and additional gating to provide a divide-bytwo counter and a three-stage binary counter for which the count cycle length is divide-by-five for the ’LS90 and divideby-eight for the ’LS93 All of these counters have a gated zero reset and the LS90 also has gated set-to-nine inputs for use in BCD nine’s complement applications To use their maximum count length (decade or four bit binary) the B input is connected to the QA output The input count pulses are applied to input A and the outputs are as described in the appropriate truth table A symmetrical divide-by-ten count can be obtained from the ’LS90
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