Datasheet4U Logo Datasheet4U.com

P89LPC972 - 8-bit microcontroller

Download the P89LPC972 datasheet PDF. This datasheet also covers the P89LPC970 variant, as both devices belong to the same 8-bit microcontroller family and are provided as variant models within a single manufacturer datasheet.

General Description

The P89LPC970/971/972 is a single-chip microcontroller, available in low cost packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices.

Key Features

  • 2.1 Principal features.
  • 2 kB/4 kB/8 kB byte-erasable flash code memory organized into 1 kB sectors and 64-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage.
  • 256-byte RAM data memory.
  • Two analog comparators with selectable inputs and reference source.
  • Five 16-bit counter/timers (each may be configured to toggle a port output upon timer overflow or to become a PWM output).
  • A 23-bit system timer that can also.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (P89LPC970_NXPSemiconductors.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription for P89LPC972 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for P89LPC972. For precise diagrams, and layout, please refer to the original PDF.

www.DataSheet4U.com P89LPC970/971/972 8-bit microcontroller with accelerated two-clock 80C51 core 2 kB/4 kB/8 kB wide-voltage byte-erasable flash Rev. 02 — 27 April 2010 ...

View more extracted text
kB/4 kB/8 kB wide-voltage byte-erasable flash Rev. 02 — 27 April 2010 Product data sheet 1. General description The P89LPC970/971/972 is a single-chip microcontroller, available in low cost packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC970/971/972 in order to reduce component count, board space, and system cost. 2. Features and benefits 2.1 Principal features „ 2 kB/4 kB/8 kB byte-erasable flash code memory organized into 1 kB sectors and 64-byte pa