P89LPC972 Datasheet (PDF) Download
NXP Semiconductors
P89LPC972

Description

The P89LPC970/971/972 is a single-chip microcontroller, available in low cost packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC970/971/972 in order to reduce component count, board space, and system cost.

Key Features

  • 1 Principal features
  • 2 kB/4 kB/8 kB byte-erasable flash code memory organized into 1 kB sectors and 64-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage.
  • 256-byte RAM data memory.
  • Two analog comparators with selectable inputs and reference source.
  • Five 16-bit counter/timers (each may be configured to toggle a port output upon timer overflow or to become a PWM output).
  • A 23-bit system timer that can also be used as real-time clock consisting of a 7-bit prescaler and a programmable and readable 16-bit timer.
  • Enhanced UART with a fractional baud rate generator, break detect, framing error detection, and automatic address detection; 400 kHz byte-wide I2C-bus communication port.
  • SPI communication port (pin remap).
  • High-accuracy internal RC oscillator option 7.373 MHz calibrated to ±1 %, with clock doubler option, allows operation without external oscillator components. The RC oscillator option is selectable and fine tunable.
  • Watchdog timer with separate on-chip oscillator, nominal 400 kHz/25 kHz, calibrated to ±10 % at 400 kHz, requiring no external components. The watchdog prescaler is selectable from eight values.