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PNX8526 Datasheet

Programmable source decoder with integrated peripherals

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PNX8526
Programmable source decoder with integrated peripherials
Rev. 02 — 11 July 2005
Product data sheet
1. General description
The PNX8526 is a highly integrated media processor for use in Advanced Set Top Boxes
(ASTB) and Digital Television (DTV) systems. The PNX8526 is targeted at the mid to
high-end ASTB/DTV systems, decoding ‘all format’ HD and SD MPEG-2 source material
with Standard Definition (SD), or double line-rate SD display capabilities. Although the
PNX8526 can process high level input formats, its display capabilities are primarily
targeted at NTSC, PAL and SECAM televisions. It is also intended for lower cost DTVs,
those not considered high definition. Progressive output is also available for double
line-rate television displays, or for high resolution graphic content to be displayed on a
computer monitor. The PNX8526 is designed in a high performance 0.12 micron process.
The PNX8526 performs source decode functions, including conditional access, MPEG-2
transport stream demultiplexing, MPEG-2 video decode, audio decode and processing,
graphics generation, video processing, and image composition and display. A 32-bit,
200 MHz VLIW processor, referred to as the TriMedia 3200 CPU core (TM32 CPU),
carries out the majority of media processing operations performed by the PNX8526. Fixed
function hardware will perform some operations that are not handled by the TM32 CPU.
Additionally, the PNX8526 supports a number of peripheral interfaces such as I2C-bus,
USB, IDE and UART. Other interfaces such as IEEE-1284 and Ethernet may be supported
via SuperI/O devices that reside on a PCI expansion bus. The expansion bus also
provides for glueless interface to 8-bit wide slave devices, such as flash/ROM, DOCSIS
modem, UARTs, etc.
An embedded MIPS processor (PR3940) running at 150 MHz is intended to run the OS.
(There is no direct support for an external processor; however, a CPU of any type may be
connected to the PNX8526 via the PCI interface.) This implies a complete CPU
subsystem consisting of the CPU itself, local memory, and an interface to PCI. The MIPS
processor is primarily responsible for control functions and graphics-intensive operating
systems, while the TM32 CPU is responsible for running all real-time media processing
functions. All resources supported within the PNX8526 are accessible by both the MIPS
processor and the TM32 CPU. The software documentation of the PNX8526 provides
more details on the interaction between the MIPS and the TM32 CPU.
The PNX8526 is intended to be used with a small companion IC, the PNX8510. This
analog companion chip provides the majority of analog video and audio support for the
output of the PNX8526. The PNX8510 companion is capable of simultaneously driving
two video channels (six DACs) and two stereo audio channels (four DACs).


NXP Semiconductors Electronic Components Datasheet

PNX8526 Datasheet

Programmable source decoder with integrated peripherals

No Preview Available !

Philips Semiconductors
PNX8526
Programmable source decoder with integrated peripherials
2. Features
s 200 MHz, 5-instruction/clock cycle, 32-bit VLIW processing core (TM32 CPU)
s 150 MHz, MIPS PR3940 processing core
s External CPU support via PCI
s Support for multiple digital video (D1) input streams
s Support for multiple MPEG-2 or DIRECTV transport streams (parallel format)
s On-chip conditional access for DVB, DES, MULTI2, CAM and DIRECTV
s On-chip copy protection support for OpenCable and ATSC (NRSS-B)
s Simultaneous decode of two SD streams (MPEG-2) or one HD MPEG stream
(AFD style HD-SD decode)
s Simultaneous decode of two AC-3 or equivalent audio streams
s High performance 2D rendering and DMA capability
s Dual image composition/screen refresh engines: four layer primary output, two layer
secondary output
s Multiple channel output to support watch/record and multi-room modes
s Embedded 1394 link layer with 5C copy protection
s Soft modem support via SSI interface
s 16 MB, 32 MB and 64 MB unified memory architecture implemented with high-speed
SDRAM (166 MHz)
s System expansion capability via industry standard PCI bus
s Core peripherals (I2C-bus, UART, USB, etc.) on the chip, other peripherals supported
via third-party ‘SuperI/O’ chip.
3. Applications
s Advanced Set Top Box (ASTB)
s Digital Television (DTV)
4. Ordering information
Table 1: Ordering information
Type number
Package
Name
Description
Version
PNX8526EH/M0 HBGA456 plastic thermal enhanced ball grid array package; SOT610-1
456 balls; body 35 × 35 × 1.8 mm; heatsink
PNX8526EH/M0/G HBGA456 [1] plastic thermal enhanced ball grid array package; SOT610-1
456 balls; body 35 × 35 × 1.8 mm; heatsink
[1] Lead-free (Pb-free) package.
9397 750 15101
Product data sheet
Rev. 02 — 11 July 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
2 of 65


Part Number PNX8526
Description Programmable source decoder with integrated peripherals
Maker NXP
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