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NXP Semiconductors Electronic Components Datasheet

PHT6N03LT Datasheet

TrenchMOS transistor Logic level FET

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Philips Semiconductors
TrenchMOStransistor
Logic level FET
Product specification
PHT6N03LT
FEATURES
’Trench’ technology
• Very low on-state resistance
• Fast switching
• Stable off-state characteristics
• High thermal cycling performance
• Surface mounting package
SYMBOL
g
d
s
QUICK REFERENCE DATA
VDSS = 30 V
ID = 5.9 A
RDS(ON) 30 m(VGS = 5 V)
RDS(ON) 28 m(VGS = 10 V)
GENERAL DESCRIPTION
N-channel enhancement mode
logic level field-effect power
transistor
using
trench
technology. The device has very
low on-state resistance. It is
intended for use in dc to dc
converters and general purpose
switching applications.
The PHT6N03LT is supplied in the
SOT223 surface mounting
package.
PINNING
PIN DESCRIPTION
1 gate
2 drain
3 source
tab drain
SOT223
4
123
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VDSS
VDGR
VGS
ID
IDM
PD
Tj, Tstg
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Continuous drain current
Pulsed drain current
Total power dissipation
Operating junction and
storage temperature
Tj = 25 ˚C to 150˚C
Tj = 25 ˚C to 150˚C; RGS = 20 k
Tamb = 25 ˚C; VGS = 10 V
Tamb = 100 ˚C; VGS = 10 V
Tamb = 25 ˚C
MIN.
-
-
-
-
-
-
-
- 55
MAX.
30
30
± 13
5.9
4.1
23.6
1.8
150
UNIT
V
V
V
A
A
A
W
˚C
ESD LIMITING VALUE
SYMBOL PARAMETER
VC Electrostatic discharge
capacitor voltage, all pins
CONDITIONS
Human body model (100 pF, 1.5 k)
MIN.
-
MAX.
2
UNIT
kV
THERMAL RESISTANCES
SYMBOL PARAMETER
Rth j-sp
Rth j-a
Thermal resistance junction
to solder point
Thermal resistance junction
to ambient
CONDITIONS
mounted on any pcb
mounted on test pcb of fig:17
MIN. TYP. MAX. UNIT
- - 15 K/W
- 70 - K/W
January 1998
1
Rev 1.300


NXP Semiconductors Electronic Components Datasheet

PHT6N03LT Datasheet

TrenchMOS transistor Logic level FET

No Preview Available !

Philips Semiconductors
TrenchMOStransistor
Logic level FET
Product specification
PHT6N03LT
ELECTRICAL CHARACTERISTICS
Tj= 25˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
V(BR)DSS
V(BR)GSS
VGS(TO)
RDS(ON)
gfs
IDSS
IGSS
Qg(tot)
Qgs
Qgd
td on
tr
td off
tf
Ld
Ld
Ls
Drain-source breakdown
voltage
Gate-source breakdown
voltage
Gate threshold voltage
Drain-source on-state
resistance
Forward transconductance
Zero gate voltage drain
current
Gate source leakage current
Total gate charge
Gate-source charge
Gate-drain (Miller) charge
VGS = 0 V; ID = 0.25 mA;
IG = 1 mA
Tj = -55˚C
VDS = VGS; ID = 1 mA
Tj = 150˚C
Tj = -55˚C
VGS = 5 V; ID = 3.2 A
VGS = 10 V; ID = 3.2 A
VGS = 5 V; ID = 3.2 A; Tj = 150˚C
VDS = 25 V; ID = 5.9 A
VDS = 30 V; VGS = 0 V;
Tj = 150˚C
VGS = ±5 V; VDS = 0 V
Tj = 150˚C
ID = 5.9 A; VDD = 24 V; VGS = 5 V
Turn-on delay time
Turn-on rise time
Turn-off delay time
Turn-off fall time
VDD = 15 V; ID = 5.9 A;
VGS = 5 V; RG = 5
Resistive load
Internal drain inductance
Internal drain inductance
Internal source inductance
Measured from tab to centre of die
Measured from drain lead to centre of die
Measured from source lead to source
bond pad
Ciss Input capacitance
Coss Output capacitance
Crss Feedback capacitance
VGS = 0 V; VDS = 25 V; f = 1 MHz
MIN. TYP. MAX. UNIT
30 -
27 -
10 -
-V
-V
-V
1 1.5 2
V
0.6 -
-V
- - 2.3 V
- 24 30 m
- 18 28 m
- - 51 m
8 14 - S
- 0.05 10 µA
- - 500 µA
- 0.02 1 µA
- - 10 µA
- 24 - nC
- 3 - nC
- 11 - nC
- 30 45 ns
- 80 130 ns
- 95 135 ns
- 40 55 ns
- 3.5 - nH
- 3.5 - nH
- 7.5 - nH
- 1050 -
- 270 -
- 140 -
pF
pF
pF
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
Tj = 25˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
IS Continuous source current
(body diode)
ISM Pulsed source current (body
diode)
VSD Diode forward voltage
IF = 5.9 A; VGS = 0 V
trr
Reverse recovery time
IF = 5.9 A; -dIF/dt = 100 A/µs;
Qrr Reverse recovery charge VGS = -10 V; VR = 25 V
MIN. TYP. MAX. UNIT
- - 5.9 A
- - 10 A
- 0.75 1.2 V
- 100 - ns
- 0.4 - µC
January 1998
2
Rev 1.300


Part Number PHT6N03LT
Description TrenchMOS transistor Logic level FET
Maker NXP
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