PCF2104C Datasheet | NXP Semiconductors

FEATURES APPLICATIONS GENERAL DESCRIPTION Packages Available types ORDERING INFORMATION BLOCK DIAGRAM PINNING PIN FUNCTIONS RS: register select (parallel control) R/W: read/write (parallel control) E: data bus clock (parallel control) DB0 to DB7: data bus (parallel control) C1 to C60: column driver outputs R1 to R32: row driver outputs VLCD: LCD power supply OSC: oscillator SCL: serial clock line SDA: serial data line SA0: address pin T1: test pad FUNCTIONAL DESCRIPTION LCD bias voltage generator Oscillator External clock Power-on reset Registers Busy Flag Address Counter (AC) Display data RAM (DDRAM) Character generator ROM (CGROM) Character generator RAM (CGRAM) Cursor control circuit Timing generator LCD row and column drivers Programming of MUX 1 : 16 displays with PCF2104x Programming of MUX 1 : 32 displays with PCF2104x Reset function INSTRUCTIONS Clear display Return home Entry mode set I/D S 9.4 9.4.1 9.4.2 9.4.3 9.5 9.6 9.6.1 9.6.2 9.7 9.8 9.9 9.10 9.11 10 11 11.1 11.2 11.3 11.4 11.5 11.6 12 13 14 15 16 17 17.1 17.2 17.3 17.4 17.5 18 19 20 21 PCF2104x Display on/off control D C B Cursor/display shift Function set DL (parallel mode only) N, M Set CGRAM address Set DDRAM address Read busy flag and address Write data to CGRAM or DDRAM Read data from CGRAM or DDRAM INTERFACE TO MICROCONTROLLER (PARALLEL INTERFACE) INTERFACE TO MICROCONTROLLER (I2C-BUS INTERFACE) Characteristics of the I2C-bus Bit transfer Start and stop conditions System configuration Acknowledge I2C-bus protocol LIMITING VALUES HANDLING DC CHARACTERISTICS AC CHARACTERISTICS TIMING DIAGRAMS APPLICATION INFORMATION 8-bit operation, 2 × 12 display using internal reset 4-bit operation, 2 × 12 display using internal reset 8-bit operation, 2 × 24 display I2C operation, 2 × 12 display Initializing by instruction BONDING PAD LOCATIONS DEFINITIONS LIFE SUPPORT APPLICATIONS PURCHASE OF PHILIPS I2C PONENTS 1997 Dec 16 Philips Semiconductors Product specification LCD controller/driver 1...