74HC138 decoder/demultiplexer equivalent, 3-to-8 line decoder/demultiplexer.
* Complies with JEDEC standard no. 7A
* Input levels:
* For 74HC138: CMOS level
* For 74HCT138: TTL level
* Demultiplexing capability.
The 74HC138; 74HCT138 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1, E2 and E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is .
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