74HC133
FEATURES
- Output capability: standard
- ICC category: SSI GENERAL DESCRIPTION
The HC133 is an high-speed Si-gate CMOS device and is pin patible with low power Schottky TTL (LSTTL). It is specified in pliance with JEDEC standard no. 7A. The 74HC133 provides the 13-input NAND function. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns SYMBOL t PHL/t PLH CI CPD PARAMETER propagation delay A..M to Y input capacitance power dissipation per gate notes 1 and 2 CONDITIONS CL = 15 p F; VCC = 5 V 9 3.5 19 TYPICAL ns p F p F UNIT
Notes to the quick reference data 1. CPD is used to determine the dynamic power dissipation (PD in µW) PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz; CL = output load capacitance in p F; fo = output frequency in MHz; VCC = supply voltage in V; ∑ (CL × VCC2 × fo) = sum of the outputs. 2. For HC the condition is VI = GND to VCC ORDERING INFORMATION PACKAGES TYPE NUMBER PINS 74HC133N 74HC133D 16 16 DIL SO PIN POSITION...
