ZL40260 buffer equivalent, low additive jitter 2 x10 lvpecl fanout buffer.
* Two inputs accept any differential (LVPECL, HCSL, LVDS, SSTL, CML) or single ended LVCMOS signal
* Ten 2.5V/3.3V LVPECL outputs
* Ultra-low additive jitter:.
* General purpose clock distribution
* Low jitter clock trees
* Logic translation
* Clock and data sign.
...... 6 Functional Description....... 8 Clock Inputs.. 8 Clock Outputs ....... 11 Termination of unused inputs and outputs ..... 13 Power Consumption........ 13 Power Supply Filtering .... 13 Power Supplies and Power-up Sequence...... 13 AC and DC E.
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