Datasheet4U Logo Datasheet4U.com

ZL40231 - Low Additive Jitter 10 output LVPECL/LVDS/HCSL Fanout Buffer

Description

6 Functional Description 9 Clock Inputs 9 Clock Outputs 12 Crystal Oscillator Input 13 Termination of unused inputs and outputs 13 Power Consumption 13 Power Supply Filtering 14 Power Supplies and Power-up Sequence 14 Host Interface 15 Typical device performance 16 AC and DC Electrical Char

Features

  • 3 to 1 input Multiplexer: Two inputs accept any differential (LVPECL, HCSL, LVDS, SSTL, CML, LVCMOS) or a single ended signal and the third input accepts a crystal or a single ended signal.
  • Ten differential LVPECL/LVDS/HCSL outputs.
  • One LVCMOS output.
  • Ultra-low additive jitter: 24fs (integration band: 12kHz to 20MHz at 625MHz clock frequency).
  • Supports clock frequencies from 0 to 1.6GHz.
  • Supports 2.5V or 3.3V power supplies on LVPECL, LVDS o.

📥 Download Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Data Sheet ZL40231 Low Skew, Low Additive Jitter, 10 output LVPECL/LVDS/HCSL Fanout Buffer with one LVCMOS output Features • 3 to 1 input Multiplexer: Two inputs accept any differential (LVPECL, HCSL, LVDS, SSTL, CML, LVCMOS) or a single ended signal and the third input accepts a crystal or a single ended signal • Ten differential LVPECL/LVDS/HCSL outputs • One LVCMOS output • Ultra-low additive jitter: 24fs (integration band: 12kHz to 20MHz at 625MHz clock frequency) • Supports clock frequencies from 0 to 1.6GHz • Supports 2.5V or 3.3V power supplies on LVPECL, LVDS or HCSL outputs • Supports 1.5V, 1.8V, 2.5V or 3.
Published: |