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ZL40240 - Ten LVCMOS Output Low Additive Jitter Fanout Buffer

Description

6 Functional Description 9 Clock Inputs 9 Clock Outputs 12 Crystal Oscillator Input 12 Termination of unused inputs and outputs 14 Power Consumption 15 Power Supply Filtering 17 Device Control 17 Register Map 21 AC and DC Electrical Characteristics 26 Absolute Maximum Ratings 26 Recommend

Features

  • 3 to 1 input Multiplexer: Two inputs accept any differential (LVPECL, HCSL, LVDS, SSTL, CML, LVCMOS) or a single ended signal and the third input accepts a crystal or a single ended signal.
  • Ten 1.5V/1.8V/2.5V/3.3V LVCMOS outputs.
  • Supports frequencies from 0 to 250MHz.
  • Ultra-low system level additive jitter: 17fs (12kHz to 20MHz).
  • Ultra-low noise floor of -170dBc/Hz.
  • Supports crystals from 8MHz to 160MHz.
  • Supports 2.5V or 3.3V power supplies.
  • Output to out.

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Datasheet preview – ZL40240

Datasheet Details

Part number ZL40240
Manufacturer Microsemi
File Size 950.76 KB
Description Ten LVCMOS Output Low Additive Jitter Fanout Buffer
Datasheet download datasheet ZL40240 Datasheet
Additional preview pages of the ZL40240 datasheet.

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Full PDF Text Transcription

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Data Sheet ZL40240 Ten LVCMOS Output Low Additive Jitter Fanout Buffer Features  3 to 1 input Multiplexer: Two inputs accept any differential (LVPECL, HCSL, LVDS, SSTL, CML, LVCMOS) or a single ended signal and the third input accepts a crystal or a single ended signal  Ten 1.5V/1.8V/2.5V/3.3V LVCMOS outputs  Supports frequencies from 0 to 250MHz  Ultra-low system level additive jitter: 17fs (12kHz to 20MHz)  Ultra-low noise floor of -170dBc/Hz  Supports crystals from 8MHz to 160MHz  Supports 2.5V or 3.
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