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ZL30256 - Jitter Attenuator

Description

6.

Features

  • One, Two or Three DPLL Channels.
  • Programmable bandwidth, 14Hz to 470Hz.
  • Freerun or holdover on loss of all inputs.
  • Hitless reference switching.
  • High-resolution holdover averaging.
  • Per-DPLL phase adjustment, 1ps resolution.
  • Programmable tracking range, phase-slope limiting, frequency-change limiting and other advanced features.
  • Input Clocks.
  • Accepts up to 10 differential or CMOS inputs.
  • Any input frequency.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Block Diagram page 7. Register Map section 9.
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