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ZL30166 Datasheet Triple Channel Network Synchronization Clock Translator

Manufacturer: Microsemi (now Microchip Technology)

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General Description

29 Figure 14 "Typical Power-Up Reset and Configuration Circuit" 30 5.1, “ZL30166 Configuration programming“ 204 13.0, “Package Markings“ Change Included availability of customer defined default configurations Updated GPIO[5:6] power-up settings Updated GPIO[5:6] power-up settings Added section 5.

Key Features

  • Three programmable digital PLLs/Numerically Controlled Oscillators (NCOs).
  • Synchronize to any clock rate from 1 KHz to 750 MHz.
  • Four programmable synthesizers generate any clock rate from 1 Hz to 750 MHz with low jitter for 10G PHYs.
  • Flexible two-stage architecture translates between arbitrary data rates, line coding rates and FEC rates.
  • Digital PLLs filter jitter from 5.2 Hz up to 1 kHz.
  • Automatic hitless reference switching and digital hol.

More Datasheets from Microsemi (now Microchip Technology)

Part Number Description
ZL30160 Four Channel Universal Clock Translator
ZL30161 Network Synchronization Clock Translator
ZL30163 Network Synchronization Clock Translator
ZL30165 Quad Clock Translator
ZL30167 Dual Clock Translator
ZL30168 Enhanced Quad Clock Translator
ZL30169 Clock Translator
ZL30130 Stratum 2/3/3E System Synchronizer/SETS
ZL30136 Network Interface Synchronizer
ZL30138 Stratum 2/3/3E System Synchronizer/SETS