SY89874U Datasheet | Microchip Technology

Part: SY89874U
Description: Programmable Clock Divider/Fanout Buffer
Manufacturer: Microchip Technology
Size: 1.28 MB

Microchip Technology

SY89874U

Overview

This low-skew, low-jitter device is capable of accepting a high-speed (e.g., 622 MHz or higher) CML, LVPECL, LVDS, or HSTL clock input signal and dividing down the frequency using a programmable divider ratio to create a frequency-locked, lower speed version of the input clock. Available divider ratios are 2, 4, 8, and 16, or straight pass-through.

Integrated Programmable Clock Divider and 1:2 Fanout Buffer
Guaranteed AC Performance over Temperature and Voltage: - >2.5 GHz fMAX - <250 ps tr/tf - <15 ps Within-Device Skew
Low Jitter Design: - <10 psPP Total Jitter - <1 psRMS Cycle-to-Cycle Jitter
Unique Input Termination and VT Pin for DC-Coupled and AC-Coupled Inputs; CML, PECL, LVDS, and HSTL
TTL/CMOS Inputs for Select and Reset
100KEP-Compatible LVPECL Outputs
Parallel Programming Capability
Programmable Divider Ratios of 1, 2, 4, 8, and 16
Low-Voltage Operation: 2.5V or 3.3V
Output Disable Function

Datasheets by Manufacturer

SY89874U — Micrel Semiconductor — Programmable Clock Divider/Fanout Buffer
SY89874AU — Micrel Semiconductor — 2.5GHz Any-In to LVPECL Programmable Clock Divider/Fanout Buffer
SY89875U — Micrel Semiconductor — IN-TO-LVDS PROGRAMMABLE CLOCK DIVIDER AND 1:2 FANOUT BUFFER
SY89876L — Micrel Semiconductor — ANY DIFFERENTIAL IN-TO-LVDS PROGRAMMABLE CLOCK DIVIDER AND 1:2 FANOUT BUFFER W/ INTERNAL TERMINATION
SY89872U — Micrel Semiconductor — IN-TO-LVDS PROGRAMMABLE CLOCK DIVIDER/FANOUT BUFFER