* RDS(ON)≦345mΩ@VGS=10V
* RDS(ON)≦365mΩ@VGS=4.5V
* Super high density cell design for extremely low RDS(ON)
* Exceptional on-resistance and maximum DC cur.

* Power Management in Note book
* DC/DC Converter
* Load Switch
* LCD Display inverter PIN CONFIGURATIO.

The ME10N15 is the N-Channel logic enhancement mode power field effect transistors, using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on state resistance. These devices are particularly suit.

ME10N15-G

ME100N03T

ME100N03T-G

ME100N15T-G

ME1117

ME1117-1.8

ME1117-2.5

ME1117-3.3

ME1117-5.0

ME1117A12

ME1117A18

ME1117A25

ME1117A33

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