• Part: ISPCLOCK5500
  • Description: In-System Programmable Zero-Delay
  • Manufacturer: Lattice Semiconductor
  • Size: 1.28 MB
ISPCLOCK5500 Datasheet (PDF) Download
Lattice Semiconductor
ISPCLOCK5500

Description

The ispClock5300S is an in-system-programmable zero delay universal fan-out buffer for use in clock distribution applications.

Key Features

  • Four Operating Configurations
  • Zero delay buffer Zero delay and non-zero delay buffer Dual non-zero delay buffer Non-zero delay buffer with output divider
  • Up to +/- 5ns skew range
  • Coarse and fine adjustment modes
  • Up to Three Clock Frequency Domains
  • Flexible Clock Reference and External Feedback Inputs
  • Clock A/B selection multiplexer
  • Programmable Feedback Standards - LVTTL, LVCMOS, SSTL, HSTL
  • Programmable termination
  • 8MHz to 267MHz Input/Output Operation