HSP48212 - Digital Video Mixer

Description

NAME CLK DINA0-11 PLCC PIN 9 29-31 33-34 36-38 40-43 10-15, 17 19-23 62-65 67-68 2-7 28 TYPE I I DESCRIPTION Clock Input.

All signal pins are synchronous with respect to this clock except LD, DEL, OE, and BYPASS.

Input Data Bus.

Features

• 12-Bit Pixel Data.
• Two’s Complement or Unsigned Data.
• 12-Bit Mix Factor.
• 13-Bit Signed or Unsigned Three State Output.
• Overflow Detection and Output Saturation.
• Rounding to 8, 10, 12, or 13-Bits.
• Input and Output Pixel Data Synchronous to Clock.
• Programmable Pipeline Delay of up to 7 Clock Cycles for Control of Misaligned Input Data.
• TTL Compatible Inputs/Outputs.
• DC to 40MHz Clock Rate.