Download the IS61LF6436A datasheet PDF.
This datasheet also covers the IS61LF6432A variant, as both devices belong to the same synchronous flow-through static ram family and are provided as variant models within a single manufacturer datasheet.
General Description
low-power synchronous static RAM designed to provide a burstable, high-performance, memory.
IS61LF6432A is organized as 65,536 words by 32 bits.
IS61LF6436A is organized as 65,536 words by 36 bits.
Key Features
Internal self-timed write cycle.
Individual Byte Write Control and Global Write.
Clock controlled, registered address, data and
control.
Interleaved or linear burst sequence control us-
ing MODE input.
Three chip enables for simple depth expansion
and address pipelining.
Note: The manufacturer provides a single datasheet file (IS61LF6432A_IntegratedSiliconSolution.pdf) that lists specifications for multiple related part numbers.
Full PDF Text Transcription for IS61LF6436A (Reference)
Note: Below is a high-fidelity text extraction (approx. 800 characters) for
IS61LF6436A. For precise diagrams, and layout, please refer to the original PDF.
IS61LF6436A IS61LF6432A ® Long-term Support World Class Quality 64Kx32, 64Kx36 SYNCHRONOUS FLOW-THROUGH STATIC RAM MAY 2017 FEATURES • Internal self-timed write cycle • I...
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UGH STATIC RAM MAY 2017 FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Interleaved or linear burst sequence control us- ing MODE input • Three chip enables for simple depth expansion and address pipelining • Common data inputs and data outputs • Power-down control by ZZ input • JEDEC 100-Pin TQFP package • Power Supply: +3.3V Vdd +3.3V or 2.
IS61LF6436A Datasheet
