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V103A - TRIPLE 10-BIT LVDS TRANSMITTER

Description

The V103A LVDS display interface transmitter is primarily designed to support pixel data transmission between a video processing engine and a digital video display.

Features

  • Pin compatible with THine THC63LVD103.
  • Wide pixel clock range: 8 - 135 MHz.
  • Guaranteed operation over -20 to +85° C ambient temperature.
  • Supports a wide range of video and graphics modes including VGA, SVGA, XGA, SXGA, SXGA+, NTSC, PAL, SDTV, and HDTV up to 1080I or 720P.
  • Internal PLL requires no external loop filter.
  • Selectable rising or falling clock edge for data alignment.
  • Compatible with Spread Spectrum clock source.

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Datasheet Details

Part number V103A
Manufacturer Integrated Device Technology
File Size 179.37 KB
Description TRIPLE 10-BIT LVDS TRANSMITTER
Datasheet download datasheet V103A Datasheet

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V103 TRIPLE 10-BIT LVDS TRANSMITTER

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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V103A TRIPLE 10-BIT LVDS TRANSMITTER FOR VIDEO General Description The V103A LVDS display interface transmitter is primarily designed to support pixel data transmission between a video processing engine and a digital video display. The data rate supports up to SXGA+ resolutions and can be used in Plasma, Rear Projector, Front Projector, CRT and LCD display applications. It can also be used in other high-bandwidth parallel data applications and provides a low EMI interconnect over a low cost, low bus width cable up to several meters in length. The V103A converts 35 bits of CMOS/TTL data, clocked on the rising or falling edge of an input clock (selectable), into six LVDS (Low Voltage Differential Signaling) serial data stream pairs.
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