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IDT74FCT388915T150 - 3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

Download the IDT74FCT388915T150 datasheet PDF. This datasheet also covers the IDT-74FCT variant, as both devices belong to the same 3.3v low skew pll-based cmos clock driver with (3-state) family and are provided as variant models within a single manufacturer datasheet.

Description

RST is low, all the outputs are put in high impedance state and The IDT54/74FCT388915T uses phase-lock loop technol- registers at Q, Q and Q/2 outputs are reset.

ogy to lock the frequency and phase of outputs to the input The IDT54/74FCT388915T requires one external loop filter reference clock.

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Note: The manufacturer provides a single datasheet file (IDT-74FCT-388915T.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number IDT74FCT388915T150
Manufacturer Integrated Device Technology
File Size 145.69 KB
Description 3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)
Datasheet download datasheet IDT74FCT388915T150 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
IDT54/74FCT388915T 70/100/133/150 3.3V LOW SKEW PLL-BASED CLOCK DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES Integrated Device Technology, Inc. 3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER (WITH 3-STATE) IDT54/74FCT388915T 70/100/133/150 PRELIMINARY is fed back to the PLL at the FEEDBACK input resulting in essentially zero delay across the device. The PLL consists of • 0.5 MICRON CMOS Technology the phase/frequency detector, charge pump, loop filter and • Input frequency range: 10MHz – f2Q Max. spec VCO. The VCO is designed for a 2Q operating frequency (FREQ_SEL = HIGH) range of 40MHz to f2Q Max. • Max. output frequency: 150MHz The IDT54/74FCT388915T provides 8 outputs with 350ps • Pin and function compatible with FCT88915T, MC88915T skew.
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