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ICS671-06 - Low Skew Buffer

Description

The ICS671-06 is a low phase noise, high-speed PLL-based, 8 output, low skew zero delay buffer.

Based on ICS’ proprietary low jitter Phase-Locked Loop (PLL) techniques, the device provides eight low skew outputs at speeds up to 133 MHz at 3.3 V.

Features

  • Clock outputs from 10 to 133 MHz Zero input-output delay Eight low skew (.

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Datasheet Details

Part number ICS671-06
Manufacturer Integrated Circuit Systems
File Size 196.86 KB
Description Low Skew Buffer
Datasheet download datasheet ICS671-06 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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ICS671-06 3.3 VOLT ZERO DELAY, LOW SKEW BUFFER Description The ICS671-06 is a low phase noise, high-speed PLL-based, 8 output, low skew zero delay buffer. Based on ICS’ proprietary low jitter Phase-Locked Loop (PLL) techniques, the device provides eight low skew outputs at speeds up to 133 MHz at 3.3 V. The outputs can be generated from the PLL (for zero delay), or directly from the input (for testing), and can be set to tri-state mode or to stop at a low level. For normal operation as a zero delay buffer, any output clock is tied to the FBIN pin. www.DataSheet4U.
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