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ICS650R-07C - Networking Clock Source

Download the ICS650R-07C datasheet PDF. This datasheet also covers the ICS650-07C variant, as both devices belong to the same networking clock source family and are provided as variant models within a single manufacturer datasheet.

General Description

The ICS650-07C is a low cost, low jitter, high performance clock synthesizer for networking applications.

Key Features

  • Packaged in 20 pin narrow (150 mil) SSOP (QSOP).
  • 12.5 MHz or 25.00 MHz fundamental crystal or clock input.
  • Six output clocks with selectable frequencies.
  • SDRAM frequencies of 67, 83, 100, and 133 MHz.
  • Buffered crystal reference output.
  • Zero ppm synthesis error in all clocks.
  • Ideal for PMC-Sierra’s ATM switch chips.
  • Full CMOS output swing with 25 mA output drive capability at TTL levels.
  • Advanced, low power, sub-mic.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (ICS650-07C_IntegratedCircuitSystems.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number ICS650R-07C
Manufacturer Integrated Circuit Systems
File Size 125.35 KB
Description Networking Clock Source
Datasheet download datasheet ICS650R-07C Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
( D a t a S h e e t : w w w . D a t a S h e e t 4 U . c o m ) PRELIMINARY INFORMATION ICS650-07C Networking Clock Source Description The ICS650-07C is a low cost, low jitter, high performance clock synthesizer for networking applications. Using analog Phase-Locked Loop (PLL) techniques, the device accepts a 12.5 MHz or 25.00 MHz clock or fundamental mode crystal input to produce multiple output clocks for networking chips, PCI devices, SDRAM, and ASICs. The ICS650-07C outputs all have 0 ppm synthesis error. See the MK74CB214, ICS551, and ICS552-01 for non-PLL buffer devices which produce multiple low-skew copies of these output clocks. See the ICS570, ICS9112-16/17/18 for zero delay buffers that can synchronize outputs and other needed clocks.