2EDN7524F
2EDN7524F is advanced dual-channel driver manufactured by Infineon.
Features
Fast, precise, strong and patible
- Highly efficient SMPS enabled by 5 ns fast slew rates and 17 ns propagation delay precision for fast MOSFET and Ga N switching
- 1 ns channel-to-channel propagation delay accuracy enables safe use of two channels in parallel
- Two independent 5 A channels enable numerous deployment options
- Industry standard packages and pinout ease system-design upgrades
The new Reference in Ruggedness
- 4.2 V and 8 V UVLO (Under Voltage Lock Out) options ensure instant MOSFET protection under abnormal conditions
- -10 V control and enable input robustness delivers crucial safety margin when driving pulse-transformers or driving MOSFETs in through hole packaging
- 5 A reverse current robustness eliminates the need for output protection circuitry.
Typical Applications
- Server SMPS
- Tele SMPS
- DC-to-DC Converter
- Bricks
- Power Tools
- Industrial SMPS
- Motor Control
- Solar SMPS
Example Topologies
- Single and interleaved PFC
- LLC, ZVS with pulse transformer
- Synchronous Rectification
Description
The 2EDN752x/2EDN852x is an advanced dual-channel driver. It is suited to drive logic and normal level MOSFETs and supports Opti MOS™, Cool MOS™, Standard Level MOSFETs, Superjunction MOSFETs, as well as IGBTs and Ga N Power devices.
Please read the Important Notice and Warnings at the end of this document
.infineon.
Rev. 2.7 2025-03-18
Eice DRIVER™
2EDN752x/2EDN852x
Features
The control and enable inputs are LV-TTL patible (CMOS 3.3 V) with an input voltage range from -5 V to +20 V. -10 V input pin robustness protects the driver against latch-up or electrical overstress which can be induced by parasitic ground inductances. This greatly enhances system stability.
4.2 V and 8 V UVLO (Under Voltage Lock Out) options ensure instant MOSFET and Ga N protection under abnormal conditions. Under such circumstances, this UVLO mechanism provides crucial independence from whether and when other supervisors circuitries detect abnormal...