MJD50 transistor equivalent, silicon npn power transistor.
*Minimum Lot-to-Lot variations for robust device performance
and reliable operation
APPLICATIONS
*Designed for .
*DC Current Gain -hFE = 30~150@ IC= 0.3A
*Collector-Emitter Sustaining Voltage-
: VCEO(SUS) = 400V(Min)
*DPAK for Surface Mount Applications
*Minimum Lot-to-Lot variations for robust device performance
and reliable operation
APPLICAT.
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