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IS46LR16320C - 8M x 16Bits x 4Banks Mobile DDR SDRAM

Download the IS46LR16320C datasheet PDF. This datasheet also covers the IS43LR16320C variant, as both devices belong to the same 8m x 16bits x 4banks mobile ddr sdram family and are provided as variant models within a single manufacturer datasheet.

General Description

The IS43/46LR16320C is 536,870,912 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 8,388,608 words x 16 bits.

This product uses a double-data-rate architecture to achieve high-speed operation.

The Data Input/ Output signals are transmitted on a 16-bit bus.

Key Features

  • JEDEC standard 1.8V power supply.
  • VDD = 1.8V, VDDQ = 1.8V.
  • Four internal banks for concurrent operation.
  • MRS cycle with address key programs - CAS latency 2, 3 (clock) - Burst length (2, 4, 8, 16) - Burst type (sequential & interleave).
  • Fully differential clock inputs (CK, /CK).
  • All inputs except data & DM are sampled at the rising edge of the system clock.
  • Data I/O transaction on both edges of data strobe.
  • Bidirectional da.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (IS43LR16320C-ISSI.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
IS46R16160F 256Mb DDR SDRAM Integrated Silicon Solution
IS46R16320D 16Mx32 32Mx16 64Mx8 512Mb DDR SDRAM Integrated Silicon Solution
IS46R16320E 512Mb DDR SDRAM Integrated Silicon Solution
IS46R16800E 128Mb DDR SDRAM Integrated Silicon Solution
IS46R32160D 16Mx32 32Mx16 64Mx8 512Mb DDR SDRAM Integrated Silicon Solution

Other Datasheets by ISSI (now Infineon)

Part Number Description
IS46LR16320B 8M x 16Bits x 4Banks Mobile DDR SDRAM
IS46LR16320D 8M x 16Bits x 4Banks Mobile DDR SDRAM
IS46LR16128B 2Gb Mobile DDR SDRAM
IS46LR16160F 4M x 16Bits x 4Banks Mobile DDR SDRAM
IS46LR16160G 4M x 16Bits x 4Banks Mobile DDR SDRAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
IS43/46LR16320C 8M x 16Bits x 4Banks Mobile DDR SDRAM Description The IS43/46LR16320C is 536,870,912 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 8,388,608 words x 16 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The Data Input/ Output signals are transmitted on a 16-bit bus. The double data rate architecture is essentially a 2N prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. This product offers fully synchronous operations referenced to both rising and falling edges of the clock. The data paths are internally pipelined and 2n-bits prefetched to achieve very high bandwidth. All input and output voltage levels are compatible with LVCMOS.