Download the IDT71V35761S datasheet PDF.
This datasheet also covers the IDT71V35761SA variant, as both devices belong to the same 3.3v synchronous srams family and are provided as variant models within a single manufacturer datasheet.
Features
- 128K x 36 memory configurations.
- Supports high system speed:
Commercial:.
- 200MHz 3.1ns clock access time Commercial and Industrial:.
- 183MHz 3.3ns clock access time.
- 166MHz 3.5ns clock access time.
- LBO input selects interleaved or linear burst mode.
- 3.3V core power supply
Functional Block Diagram
LBO ADV
CLK ADSC
ADSP.
- Self-timed write cycle with global write control (GW), byte write enable (BWE), and byte writes (BWx).
- Power down control.