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IDT71V25761S - 128K x 36 3.3V Synchronous SRAMs

Download the IDT71V25761S datasheet PDF. This datasheet also covers the IDT71V25761YS variant, as both devices belong to the same 128k x 36 3.3v synchronous srams family and are provided as variant models within a single manufacturer datasheet.

Description

The IDT71V25761 are high-speed SRAMs organized as 128K x 36.

The IDT71V25761 SRAMs contain write, data, address and control registers.

Features

  • 128K x 36 memory configuration.
  • Supports high system speed: Commercial:.
  • 200MHz 3.1ns clock access time Commercial and Industrial:.
  • 183MHz 3.3ns clock access time.
  • 166MHz 3.5ns clock access time.
  • LBO input selects interleaved or linear burst mode.
  • Self-timed write cycle with global write control (GW), byte write enable (BWE), and byte writes (BWx).
  • 3.3V core power supply.
  • Power down controlled by ZZ input.
  • 2.5V I/O.
  • Optional - B.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (IDT71V25761YS-IDT.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number IDT71V25761S
Manufacturer IDT
File Size 261.85 KB
Description 128K x 36 3.3V Synchronous SRAMs
Datasheet download datasheet IDT71V25761S Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
128K X 36 IDT71V25761YS/S 3.3V Synchronous SRAMs 2.5V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect Features ◆ 128K x 36 memory configuration ◆ Supports high system speed: Commercial: – 200MHz 3.1ns clock access time Commercial and Industrial: – 183MHz 3.3ns clock access time – 166MHz 3.5ns clock access time ◆ LBO input selects interleaved or linear burst mode ◆ Self-timed write cycle with global write control (GW), byte write enable (BWE), and byte writes (BWx) ◆ 3.3V core power supply ◆ Power down controlled by ZZ input ◆ 2.5V I/O ◆ Optional - Boundary Scan JTAG Interface (IEEE 1149.
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