IDT70P258L
Key Features
- True Dual-Ported memory cells which allow simultaneous reads of the same memory location
- High-speed access
- Industrial: 55ns (max.)
- Separate upper-byte and lower-byte control for multiplexed bus patibility
- IDT70P258/248 easily expands data bus width to 32 bits or more using the Master/Slave select when cascading more than one device
- M/S = VDD for BUSY output flag on Master M/S = VSS for BUSY input on Slave
- Input Read Register
- Output Drive Register
- BUSY and Interrupt Flag
- On-chip port arbitration logic
