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IDT70P259L - VERY LOW POWER 1.8V 16K/8K/4K x 16 DUAL-PORT STATIC RAM

Download the IDT70P259L datasheet PDF. This datasheet also covers the IDT70P269 variant, as both devices belong to the same very low power 1.8v 16k/8k/4k x 16 dual-port static ram family and are provided as variant models within a single manufacturer datasheet.

Description

The IDT70P269/259/249 is a very low power 16K/8K/4K x 16 DualPort Static RAM.

The IDT70P269/259/249 is designed to be used as a stand-alone 256/128/64K-bit Dual-Port SRAM.

Features

  • True Dual-Ported memory cells which allow simultaneous reads of the same memory location.
  • Both ports configurable to standard SRAM or time- multiplexed address/data interface.
  • High-speed access.
  • Industrial: 65ns (max. ), ADM mode.
  • Industrial: 40ns (max. ), Standard SRAM mode.
  • Low-power operation IDT70P269/259/249L Active: 27mW (typ. ) Standby: 3.6µW (typ. ).
  • Supports 3.0V, 2.5V and 1.8V I/O's.
  • Power supply isolation functionality to aid system power.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (IDT70P269-IDT.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number IDT70P259L
Manufacturer IDT
File Size 133.62 KB
Description VERY LOW POWER 1.8V 16K/8K/4K x 16 DUAL-PORT STATIC RAM
Datasheet download datasheet IDT70P259L Datasheet

Full PDF Text Transcription

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VERY LOW POWER 1.8V 16K/8K/4K X 16 DUAL-PORT Š STATIC RAM IDT70P269/259/249L Features ◆ True Dual-Ported memory cells which allow simultaneous reads of the same memory location ◆ Both ports configurable to standard SRAM or time- multiplexed address/data interface ◆ High-speed access – Industrial: 65ns (max.), ADM mode – Industrial: 40ns (max.), Standard SRAM mode ◆ Low-power operation IDT70P269/259/249L Active: 27mW (typ.) Standby: 3.6µW (typ.) ◆ Supports 3.0V, 2.5V and 1.8V I/O's ◆ Power supply isolation functionality to aid system power management ◆ Separate upper-byte and lower-byte control ◆ Input Read Register ◆ Output Drive Register ◆ BUSY and Interrupt Flag ◆ On-chip port arbitration logic ◆ Fully asynchronous operation from either port ◆ Available in 100 Ball 0.
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