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9DBL0951 - 9-Output 3.3V PCIe Fanout Buffer

Download the 9DBL0951 datasheet PDF. This datasheet also covers the 9DBL0941 variant, as both devices belong to the same 9-output 3.3v pcie fanout buffer family and are provided as variant models within a single manufacturer datasheet.

General Description

The 9DBL09x1 devices are 3.3V members of IDT's Full-Featured PCIe clock family.

4 Common Clocked (CC) and PCIe Separate Reference Independent Spread (SRIS) systems.

Key Features

  • 9.
  • 1-200 MHz Low-Power (LP) HCSL DIF pairs.
  • 9DBL0941 default Zout = 100Ω.
  • 9DBL0951 default Zout = 85Ω.
  • 9DBL09P1 factory programmable defaults.
  • Easy AC-coupling to other logic families, see IDT.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (9DBL0941-IDT.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number 9DBL0951
Manufacturer IDT
File Size 282.77 KB
Description 9-Output 3.3V PCIe Fanout Buffer
Datasheet download datasheet 9DBL0951 Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
9DBL0242 Zero-Delay/Fanout Buffer Renesas
9DBL0242C 2 to 8-Output 3.3V PCIe Zero-Delay/Fanout Buffers Renesas
9DBL0252 Zero-Delay/Fanout Buffer Renesas
9DBL0252C 2 to 8-Output 3.3V PCIe Zero-Delay/Fanout Buffers Renesas
9DBL0255 2 and 4-Output 3.3V PCIe Gen1-5 Clock Fanout Buffers Renesas

Other Datasheets by IDT

Part Number Description
9DBL0941 9-Output 3.3V PCIe Fanout Buffer
9DBL09P1 9-Output 3.3V PCIe Fanout Buffer
9DBL02 2-output 3.3V PCIe Zero-Delay Buffer
9DBL0242 2-output 3.3V PCIe Zero-Delay Buffer
9DBL0243 2-Output 3.3V LP-HCSL Zero-Delay Buffer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
9-Output 3.3V PCIe Fanout Buffer 9DBL09x1 Description The 9DBL09x1 devices are 3.3V members of IDT's Full-Featured PCIe clock family. The 9DBL09x1 devices support PCIe Gen1–4 Common Clocked (CC) and PCIe Separate Reference Independent Spread (SRIS) systems. They offer a choice of integrated output terminations providing direct connection to 85Ω or 100Ω transmission lines. The 9DBL09P1 can be factory programmed with a user-defined power up default SMBus configuration.