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9DBL0653 - 6-output 3.3V LP-HCSL Zero-Delay Buffer

Download the 9DBL0653 datasheet PDF. This datasheet also covers the 9DBL0643 variant, as both devices belong to the same 6-output 3.3v lp-hcsl zero-delay buffer family and are provided as variant models within a single manufacturer datasheet.

General Description

The 9DBL06x3 devices are 3.3V members of IDT's Full-Featured PCIe clock family.

They support PCIe Gen1-4 Common Clock (CC) architectures and also support NVLINK applications.

The 9DBL06x3 parts have a Loss of Signal (LOS) indicator to support fault-tolerant, high reliability systems.

Key Features

  • Loss Of Signal (LOS) open drain output.
  • 6.
  • 1-200 MHz Low-Power (LP) HCSL DIF pairs.
  • 9DBL0643 default Zout = 100Ω.
  • 9DBL0653 default Zout = 85Ω.
  • Easy AC-coupling to other logic families, see IDT.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (9DBL0643-IDT.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number 9DBL0653
Manufacturer IDT
File Size 321.02 KB
Description 6-output 3.3V LP-HCSL Zero-Delay Buffer
Datasheet download datasheet 9DBL0653 Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
9DBL0651 Zero-Delay/Fanout Buffer Renesas
9DBL0651C 2 to 8-Output 3.3V PCIe Zero-Delay/Fanout Buffers Renesas
9DBL0641 Zero-Delay/Fanout Buffer Renesas
9DBL0641C 2 to 8-Output 3.3V PCIe Zero-Delay/Fanout Buffers Renesas
9DBL0242 Zero-Delay/Fanout Buffer Renesas

Other Datasheets by IDT

Part Number Description
9DBL0651 6-output 3.3V PCIe Zero-Delay Buffer
9DBL06 6-output 3.3V PCIe Zero-Delay Buffer
9DBL0641 6-output 3.3V PCIe Zero-Delay Buffer
9DBL0643 6-output 3.3V LP-HCSL Zero-Delay Buffer
9DBL02 2-output 3.3V PCIe Zero-Delay Buffer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
6-output 3.3V LP-HCSL Zero-Delay Buffer with LOS Indicator 9DBL06x3 Datasheet General Description The 9DBL06x3 devices are 3.3V members of IDT's Full-Featured PCIe clock family. They support PCIe Gen1-4 Common Clock (CC) architectures and also support NVLINK applications. The 9DBL06x3 parts have a Loss of Signal (LOS) indicator to support fault-tolerant, high reliability systems. Recommended Application PCIe Gen1-4 and NVLINK clock distribution for Riser Cards, Storage, Networking, JBOD, Communications, Access Points Output Features ▪ Loss Of Signal (LOS) open drain output ▪ 6– 1-200 MHz Low-Power (LP) HCSL DIF pairs ▪ 9DBL0643 default Zout = 100Ω ▪ 9DBL0653 default Zout = 85Ω ▪ Easy AC-coupling to other logic families, see IDT application note AN-891.