9DB833 buffer equivalent, eight output differential buffer.
* 8 - 0.7V current-mode differential HCSL output pairs
* Supports zero delay buffer mode and fanout mode
* Selectable bandwidth
* 50-110 MHz operation in .
* PLL or bypass mode; PLL can dejitter incoming clock
* Selectable PLL bandwidth; minimizes jitter peaking in
do.
The 9DB833 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB833 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator.
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