8P79818 buffer equivalent, programmable low additive jitter 2:8 buffer.
▪ Two differential inputs support LVPECL, LVDS, HCSL or LVCMOS reference clocks
— Accepts input frequencies ranging from 1PPS (1Hz) to 700MHz
▪ Select which of the two in.
The device is intended to take 1 or 2 reference clocks, select between them, using a pin or register selection and generate up to 8 outputs that may be the same as the reference frequency or integer-divider versions of it.
The 8P79818 supports two ou.
Image gallery
TAGS