HYMP125S64CP8 Datasheet, Hynix Semiconductor

* JEDEC standard Double Data Rate 2 Synchronous DRAMs (DDR2 SDRAMs) with 1.8V +/- 0.1V Power Supply
* All inputs and outputs are compatible with SSTL_1.8 interfac.

and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 1.0 / Dec. 2009 1 www.DataSheet4U.com 1200pin Unbuffered DDR2 SDRAM SO-DIMMs SPEED G.