GS8256418GD-400 sram equivalent, 288mb dcd sync burst sram.
* FT pin for user-configurable flow through or pipeline operation
* Single/Dual Cycle Deselect selectable
* IEEE 1149.1 JTAG-compatible Boundary Scan
* ZQ.
The GS8256418/36 is a 301,989,888-bit high performance synchronous SRAM with a 2-bit burst address counter. Although of .
Applications The GS8256418/36 is a 301,989,888-bit high performance synchronous SRAM with a 2-bit burst address counter. Although of a type originally developed for Level 2 Cache applications supporting high performance CPUs, the device now finds app.
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