Download the GS8256418GB-333 datasheet PDF.
This datasheet also covers the GS8256418GB-400 variant, as both devices belong to the same 288mb dcd sync burst sram family and are provided as variant models within a single manufacturer datasheet.
Description
Applications The GS8256418/36 is a 301,989,888-bit high performance synchronous SRAM with a 2-bit burst address counter.
Features
- FT pin for user-configurable flow through or pipeline operation.
- Single/Dual Cycle Deselect selectable.
- IEEE 1149.1 JTAG-compatible Boundary Scan.
- ZQ mode pin for user-selectable high/low output drive.
- 2.5 V +10%/.
- 10% core power supply.
- 3.3 V +10%/.
- 10% core power supply.
- 2.5 V or 3.3 V I/O supply.
- LBO pin for Linear or Interleaved Burst mode.
- Internal input resistors on mode pins allow floating mode.