GS8170LW72AC-300 Datasheet, GSI Technology

* Late Write mode, Pipelined Read mode
* JEDEC-standard SigmaRAM™ pinout and package
* 1.8 V +150/
  –100 mV core power supply
* 1.8 V CMOS I.

and in Flow Through mode NBT SRAMs. SigmaRAM Late Write with Pipelined Read Read CK Deselect Write Read Read Address .

Because SigmaRAMs are synchronous devices, address data inputs and read/write control inputs are captured on the rising edge of the input clock. Write cycles are internally self-timed and initiated by the rising edge of the clock input. This feature .

GS8170LW72AC-333

GS8170LW72AC-200

GS8170LW72AC-250

GS8170LW72AC

GS8170LW72C

GS8170LW72C-200

GS8170LW72C-250

GS8170LW72C-300

GS8170LW72C-333

GS8170LW36AC

GS8170LW36AC-200

GS8170LW36AC-250

GS8170LW36AC-300