GS8161E18DD srams equivalent, 18mb syncburst srams.
* FT pin for user-configurable flow through or pipeline operation
* Dual Cycle Deselect (DCD) operation
* IEEE 1149.1 JTAG-compatible Boundary Scan
* 2.5 .
* JEDEC-standard 165-bump BGA package
* RoHS-compliant 100-pin TQFP and 165-bump BGA available
Functional Descri.
Applications The GS8161E18D(GT/D)/GS8161E32D(D)/GS8161D36D(GT/D) is an 18,874,368-bit high performance synchronous SRAM with a 2-bit burst address counter. Although of a type originally developed for Level 2 Cache applications supporting high perform.
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