M13S32321A Datasheet, Elite Semiconductor Memory Technology

z z z z z z z z z z z z z z z z z z z M13S32321A 256K x 32 Bit x 4 Banks Double Data Rate SDRAM JEDEC Standard Internal pipelined double-data-rate architecture, two dat.

(M13S32321A) Pin Name Function Address inputs - Row address A0~A9 - Column address A0~A7 A8/AP : AUTO Precharge BA0, BA1 : Bank selects (4 Banks) Data-in/Data-out Row address strobe Column address strobe Write enable Ground Power Bi- directional Data.