FR81S CPU Core
* 32-bit RISC, load/store architecture, pipeline 5-stage structure
* Maximum operating frequency: 80 MHz (Source oscillation = 4.0 MHz and 20 multi.

 Memory-to-memory transfer instruction  Bit processing instruction  Barrel shift order etc.
* High-level language.

CY91590

CY91460C

CY91F463CA

CY91F465CA

CY91F467CA

CY91F467CB

CY91V460

CY96310

CY96345

CY96346

CY96380

CY96610

CY96670

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