This datasheet includes multiple variants, all published together in a single manufacturer document.
| Part number | CY7C198 |
|---|---|
| Datasheet | CY7C198 CY7 Datasheet (PDF) |
| File Size | 467.52 KB |
| Manufacturer | Cypress (now Infineon) |
| Description | 32K x 8 Static RAM |
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output pins (I/O0 through I/O7) is written intothememorylocationaddressedbythe address present on the address pins (A0 through A14). Reading the device is acĆ plishedbyselectingthedeviceandenĆ abling the outputs, CE and OE active LOW, while WE remains inactive or HIGH. Under these conditions, the conĆ tents of the location addressed by the inĆ formationonaddresspinsispresentonthe eight data input/output pins.
See all Cypress (now Infineon) datasheets
| Part Number | Description |
|---|---|
| CY7C190 | (CY7C190 / CY7C189) 16 x 4 Static R/W RAM |
| CY7C1910BV18 | 1.8V Synchronous Pipelined SRAM |
| CY7C1911BV18 | (CY7C1x1xBV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture |
| CY7C1911CV18 | (CY7C1x1xCV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture |
| CY7C1911JV18 | (CY7C1x1xJV18) 18-Mbit QDR II SRAM 4-Word Burst Architecture |
| CY7C1911KV18 | 18-Mbit QDR II SRAM Four-Word Burst Architecture |
| CY7C1916BV18 | 18-Mbit DDR-II SRAM 2-Word Burst Architecture |
| CY7C1916CV18 | (CY7C1xxxCV18) 18-Mbit DDR-II SRAM 2-Word Burst Architecture |
| CY7C1916JV18 | 18-Mbit DDR-II SRAM 2-Word Burst Architecture |
| CY7C1916KV18 | 18-Mbit DDR II SRAM Two-Word Burst Architecture |
