This datasheet includes multiple variants, all published together in a single manufacturer document.
| Part number | CY7C191xBV18 |
|---|---|
| Datasheet | CY7C191xBV18 CY7C1306BV25 Datasheet (PDF) |
| File Size | 279.66 KB |
| Manufacturer | Cypress (now Infineon) |
| Description | (CY7C1xxxxVxx) RAM9 QDR-I/DDR-I/QDR-II/DDR- II Errata |
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C May 02, 2007 RAM9 QDR-I/DDR-I/QDR-II/DDR- II Errata This document describes the DOFF issue for QDRII/DDRII and the Output Buffer and JTAG issues for QDRI/DDRI/QDRII/DDRII. Details include trigger conditions, possible workarounds and silicon revision applicability. This document should be used to pare to the respective datasheet for the devices to fully describe the device functionality.
See all Cypress (now Infineon) datasheets
| Part Number | Description |
|---|---|
| CY7C1910BV18 | 1.8V Synchronous Pipelined SRAM |
| CY7C1911BV18 | (CY7C1x1xBV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture |
| CY7C1911CV18 | (CY7C1x1xCV18) 18-Mb QDRTM-II SRAM 4-Word Burst Architecture |
| CY7C1911JV18 | (CY7C1x1xJV18) 18-Mbit QDR II SRAM 4-Word Burst Architecture |
| CY7C1911KV18 | 18-Mbit QDR II SRAM Four-Word Burst Architecture |
| CY7C1916BV18 | 18-Mbit DDR-II SRAM 2-Word Burst Architecture |
| CY7C1916CV18 | (CY7C1xxxCV18) 18-Mbit DDR-II SRAM 2-Word Burst Architecture |
| CY7C1916JV18 | 18-Mbit DDR-II SRAM 2-Word Burst Architecture |
| CY7C1916KV18 | 18-Mbit DDR II SRAM Two-Word Burst Architecture |
| CY7C1917BV18 | 1.8V Synchronous Pipelined SRAM |
