CY7C191xBV18 Datasheet | Cypress

CY7C129- DV18/CY7C130- DV25 CY7C130- BV18/CY7C130- BV25/CY7C132- BV25 CY7C131- BV18 / CY7C132- BV18/CY7C139- BV18 CY7C191- BV18/CY7C141- AV18 / CY7C142- AV18/ CY7C151- V18 /CY7C152- V18 Errata Revision: - C May 02, 2007 RAM9 QDR-I/DDR-I/QDR-II/DDR- II Errata This document describes the DOFF issue for QDRII/DDRII and the Output Buffer and JTAG issues for QDRI/DDRI/QDRII/DDRII. Details include trigger conditions, possible workarounds and silicon revision applicability. This document should be used to pare to the respective datasheet for the devices to fully describe the device functionality. Please contact your local Cypress Sales Representative for availability of the fixed devices and any other questions. .. Devices Affected Density & Revision 9Mb - Ram9(90 nm) 9Mb - Ram9(90 nm) 18Mb - Ram9(90nm) Part Numbers CY7C130- DV25 CY7C129- DV18 CY7C130- BV18 CY7C130- BV25 CY7C132- BV25 CY7C131- BV18 CY7C132- BV18 CY7C139- BV18 CY7C191- BV18 CY7C141- AV18 CY7C142- AV18 CY7C151- V18 CY7C152- V18 Architecture QDRI/DDRI QDRII QDRI/DDRI 18Mb - Ram9(90nm) QDRII/DDRII 36Mb - Ram9(90nm) 72Mb -Ram9(90nm) Table 1. List of Affected devices QDRII/DDRII QDRII/DDRII Product Status All of the above densities and revisions are available in sample as well as production quantities. QDR/DDR DOFF Pin, Output Buffer and JTAG Issues Errata Summary The following table defines the issues and the fix status for the different devices which are affected. Item Issue Device Fix Status 1. DOFF pin is used for enabling/disabling the DLL circuitry within the SRAM. To enable the DLL circuitry, DOFF pin must be externally tied HIGH. The QDR-II/DDR-II devices have an internal pull down resistor of ~5K Ω . The value of the external pullup resistor should be 500 Ω or less in order to ensure DLL is enabled. 9Mb - “D” Rev - Ram9 18Mb - “B” Rev - Ram9 36Mb - “A” Rev - Ram9 72Mb - Ram9 QDR-II/DDR-II...