CY7C1648KV18 architecture equivalent, 144-mbit ddr ii+ sram two-word burst architecture.
* 144-Mbit density (8 M × 18, 4 M × 36)
* 450-MHz clock for high bandwidth
* Two-word burst for reducing address bus frequency
* Double data rate (DDR) in.
Image gallery
TAGS
+
Manufacturer
Related datasheet
Download (Size : 597.87KB)