CY7C1618KV18 architecture equivalent, 144-mbit ddr ii sram two-word burst architecture.
* 144-Mbit density (8M × 18, 4M × 36)
* 333 MHz clock for high bandwidth
* Two-word burst for reducing address bus frequency
* Double data rate (DDR) inte.
Image gallery
TAGS
Manufacturer
Related datasheet
Download (Size : 569.14KB)