CY7C1373DV25 sram equivalent, (cy7c1371dv25 / cy7c1373dv25) flow-through sram.
* No Bus Latency™ (NoBL™) architecture eliminates dead cycles between write and read cycles
* Can support up to 133-MHz bus operations with zero wait states — Dat.
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The CY7C1371DV25/CY7C1373DV25 is a 2.5V, 512K x 36/1M x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1371DV25/CY7C1373DV25 i.
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