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CY7C1373B Datasheet (CY7C1371B / CY7C1373B) 512K x 36/1M x 18 Flow-Thru SRAM

Manufacturer: Cypress (now Infineon)

Overview: 73B CY7C1371B CY7C1373B 512K x 36/1M x 18 Flow-Thru SRAM with NoBL™.

Download the CY7C1373B datasheet PDF. This datasheet also includes the CY7C1371B variant, as both parts are published together in a single manufacturer document.

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General Description

The CY7C1371B/CY7C1373B is 3.3V, 512K × 36 and 1M × 18 synchronous flow-thru burst SRAMs, respectively designed to support unlimited true back-to-back Read/Write operations without the insertion of wait states.

The CY7C1371B/ CY7C1373B is equipped with the advanced No Bus Latency™ (NoBL) logic required to enable consecutive Read/Write operations with data being transferred on every clock cycle.

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Key Features

  • Pin compatible and functionally equivalent to ZBT devices.
  • Supports 117-MHz bus operations with zero wait states.
  • Data is transferred on every clock.
  • Internally self-timed output buffer control to eliminate the need to use asynchronous OE.
  • Registered inputs for flow-thru operation.
  • Byte Write capability.
  • Common I/O architecture.
  • Fast clock-to-output times.
  • 7.5 ns (for 117-MHz device).
  • 8.5 ns (for 100-MHz.

📁 Similar Datasheet

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