Datasheet4U Logo Datasheet4U.com

CY7C1347F - 4-Mbit (128K x 36) Pipelined Sync SRAM

General Description

The CY7C1347F is a 3.3V, 128K by 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic.

CY7C1347F I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when VDDQ = 2.5V.

Key Features

  • Fully registered inputs and outputs for pipelined operation.
  • 128K by 36 common I/O architecture.
  • 3.3V core power supply.
  • 2.5V/3.3V I/O operation.
  • Fast clock-to-output times.
  • 2.6 ns (for 250-MHz device).
  • 2.6 ns (for 225-MHz device).
  • 2.8 ns (for 200-MHz device).
  • 3.5 ns (for 166-MHz device).
  • 4.0 ns (for 133-MHz device).
  • User-selectable burst counter supporting Intel Pentium interleaved or linear bu.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
CY7C131AE 1K/2K x 8 Dual-Port Static RAM Cypress
CY7C131E 1K/2K x 8 Dual-Port Static RAM Cypress
CY7C136AE 1K/2K x 8 Dual-Port Static RAM Cypress
CY7C136E 1K/2K x 8 Dual-Port Static RAM Cypress
CY7C1370C 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Cypress

Other Datasheets by Cypress (Infineon)

Part Number Description
CY7C1347B 128K x 36 Synchronous-Pipelined Cache RAM
CY7C1347D 128K x 36 Synchronous-Pipelined Cache SRAM
CY7C1347G 4-Mbit (128K x 36) Pipelined Sync SRAM
CY7C1342 4K x 8 Dual-Port Static RAM and 4K x 8 Dual-Port SRAM
CY7C13451G 4-Mbit Flow-Through Sync SRAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com CY7C1347F 4-Mbit (128K x 36) Pipelined Sync SRAM Features • Fully registered inputs and outputs for pipelined operation • 128K by 36 common I/O architecture • 3.3V core power supply • 2.5V/3.3V I/O operation • Fast clock-to-output times — 2.6 ns (for 250-MHz device) — 2.6 ns (for 225-MHz device) — 2.8 ns (for 200-MHz device) — 3.5 ns (for 166-MHz device) — 4.