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Cypress Semiconductor Electronic Components Datasheet

CY7C131A Datasheet

1K x 8 Dual-Port Static RAM

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CY7C130, CY7C130A
CY7C131, CY7C131A
CY7C140, CY7C141
1K x 8 Dual-Port Static RAM
Features
True dual-ported memory cells, which allow simultaneous
reads of the same memory location
1K x 8 organization
0.65 micron CMOS for optimum speed and power
High speed access: 15 ns
Low operating power: ICC = 110 mA (maximum)
Fully asynchronous operation
Automatic power down
Master CY7C130/130A/CY7C131/131A easily expands data
bus width to 16 or more bits using slave CY7C140/CY7C141
BUSY output flag on CY7C130/130A/CY7C131/131A; BUSY
input on CY7C140/CY7C141
INT flag for port-to-port communication
Available in 48-pin DIP (CY7C130/130A/140), 52-pin PLCC,
52-pin TQFP
Pb-free packages available
Functional Description
The CY7C130/130A/CY7C131/131A/CY7C140[1] and CY7C141
are high speed CMOS 1K by 8 dual-port static RAMs. Two ports
are provided permitting independent access to any location in
memory. The CY7C130/130A/ CY7C131/131A can be used as
either a standalone 8-bit dual-port static RAM or as a master
dual-port RAM in conjunction with the CY7C140/CY7C141 slave
dual-port device in systems requiring 16-bit or greater word
widths. It is the solution to applications requiring shared or
buffered data, such as cache memory for DSP, bit-slice, or multi-
processor designs.
Each port has independent control pins; chip enable (CE), write
enable (R/W), and output enable (OE). Two flags are provided
on each port, BUSY and INT. BUSY signals that the port is trying
to access the same location currently being accessed by the
other port. INT is an interrupt flag indicating that data is placed
in a unique location (3FF for the left port and 3FE for the right
port). An automatic power down feature is controlled indepen-
dently on each port by the chip enable (CE) pins.
The CY7C130/130A and CY7C140 are available in 48-pin DIP.
The CY7C131/131A and CY7C141 are available in 52-pin
PLCC, 52-pin Pb-free PLCC, 52-pin PQFP, and 52-pin Pb-free
PQFP.
Logic Block Diagram
R/WL
CEL
OEL
R/WR
CER
OER
I/O7L
I/O0L
BUSYL[2]
A 9L
A 0L
I/O
CONTROL
I/O
CONTROL
ADDRESS
DECODER
MEMORY
ARRAY
ADDRESS
DECODER
I/O7R
I/O0R
BUSYR
A 9R
A 0R
[3]
INTL
CEL
OEL
R/WL
ARBITRATION
LOGIC
(7C130/7C131 ONLY)
AND
INTERRUPT LOGIC
CER
OER
R/WR
Notes
1. CY7C130 and CY7C130A are functionally identical; CY7C131 and CY7C131A are functionally identical.
2. CY7C130/130A/CY7C131/131A (Master): BUSY is open drain output and requires pull-up resistor.
CY7C140/CY7C141 (Slave): BUSY is input.
3. Open drain outputs: pull-up resistor required.
INTR[3]
Cypress Semiconductor Corporation • 198 Champion Court
Document #: 38-06002 Rev. *E
• San Jose, CA 95134-1709 • 408-943-2600
Revised December 09, 2008
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Cypress Semiconductor Electronic Components Datasheet

CY7C131A Datasheet

1K x 8 Dual-Port Static RAM

No Preview Available !

CY7C130, CY7C130A
CY7C131, CY7C131A
CY7C140, CY7C141
Pin Configurations
Figure 1. Pin Diagram - DIP (Top View)
CE L
R/W L
BUSY L
INTL
OEL
A0L
A1L
A2L
A3L
A4L
A5L
A6L
A7L
A8L
A9L
I/O0L
I/O1L
I/O2L
I/O3L
I/O4L
I/O5L
I/O6L
I/O7L
GND
1 48
2 47
3 46
4 45
5 44
6 43
7 42
8 41
9 40
10 39
11 38
12 7C130 37
13 7C140 36
14 35
15 34
16 33
17 32
18 31
19 30
20 29
21 28
22 27
23 26
24 25
VCC
CER
R/WR
BUSYR
INTR
OER
A0R
A1R
A2R
A3R
A4R
A5R
A6R
A7R
A8R
A9R
I/O7R
I/O6R
I/O5R
I/O4R
I/O3R
I/O2R
I/O1R
I/O0R
Figure 2. Pin Diagram - PLCC (Top View)
Figure 3. Pin Diagram - PQFP (Top View)
A1L
A2L
A3L
A4L
A5L
A6L
A7L
A8L
A9L
I/O0L
I/O1L
I/O2L
I/O3L
7 6 5 4 3 2 1 52 51 50 49 48 47
8 46
9 45
10 44
11 43
12 42
13 7C131
14 7C141
15
41
40
39
16 38
17 37
18 36
19 35
20 34
2122 23 24 25 26 27 28 29 30 31 32 33
OER
A0R
A1R
A2R
A3R
A4R
A5R
A6R
A7R
A8R
A9R
NC
I/O7R
A1L
A2L
A3L
A4L
A5L
A6L
A7L
A8L
A9L
I/O0L
I/O1L
I/O2L
I/O3L
52 5150 49 48 47 4645 44 43 42 41 40
1 39
2 38
3 37
4 36
5 35
6 7C131 34
7 7C141 33
8 32
9 31
10 30
11 29
12 28
13 27
1415 16 17 18 19 20 21 22 23 24 25 26
OER
A0R
A1R
A2R
A3R
A4R
A5R
A6R
A7R
A8R
A9R
NC
I/O7R
Document #: 38-06002 Rev. *E
Page 2 of 19
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Part Number CY7C131A
Description 1K x 8 Dual-Port Static RAM
Maker Cypress Semiconductor
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CY7C131A Datasheet PDF






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