CY7C1241KV18 architecture equivalent, 36-mbit qdr ii sram 4-word burst architecture.
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Configurations
With Read Cycle Latency of 2.0 cycles: CY7C1241KV18
– 4 M × 8 CY7C1256KV18
– 4 M × 9 CY7C1243KV18
– .
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Functional Description
The CY7C1241KV18, CY7C1256KV18, CY7C1243KV18, and CY7C1245KV18 are 1.8 V synchronous pipelined SRAMs, equipped with QDR II+ architecture. Similar to QDR II architecture, QDR II+ architecture cons.
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